Even as Google has moved to the top of the model race with Gemini 4 Carbon, it’s simultaneously making moves in the hardware space that powers them.
Google has expanded its eighth-generation TPU lineup with two new systems, TPU 8tx and TPU 8i Max, bringing the family to four. It’s the first time Google has introduced four TPU systems in a single year, and the company says the lineup now gives customers a purpose-built accelerator for every stage of the agentic lifecycle.
Here’s how Google is positioning the four systems:
- TPU 8t: scale-up training
- TPU 8i: low-latency reasoning
- TPU 8tx: confidential computing
- TPU 8i Max: massive context windows and the highest compute density per rack
TPU 8t and TPU 8i were unveiled at Google Cloud Next in April, with Google claiming up to 2.7x better training performance and 80% better inference price-performance versus the previous generation of TPUs. The two new systems build on that foundation, according to a blog post by Amin Vahdat, Google’s SVP and Chief Technologist for AI and Infrastructure.
TPU 8tx: Confidential Compute In Hardware
TPU 8tx is aimed at regulated enterprises and governments that want to run frontier or proprietary models and autonomous agents alongside their most sensitive data. Data is normally encrypted at rest and in transit, but has to be unlocked in memory while it’s being processed. Google says TPU 8tx builds security into the hardware layer so that data and model weights stay protected and isolated even while in use.
The system is built on the same silicon as TPU 8t and paired with 5th Generation AMD EPYC CPU hosts. By adopting the Boardfly network that Google created for real-time reasoning on TPU 8i, it delivers up to 2x lower latency than TPU 8t, with what Google calls a near-zero performance penalty for the added security.
Because it combines training-grade compute with a fast inference network, TPU 8tx is also pitched as a system on which teams can fine-tune models on private data, distill large models into smaller ones, and train agents with reinforcement learning, without moving sensitive data between clusters. Google says it’s also well suited to small-scale training.
TPU 8i Max: Two Chips, One Package
TPU 8i Max targets what Google calls the memory wall. When dozens of agents work across an entire codebase or hours of video at once, memory bandwidth quickly becomes the bottleneck. Google’s answer was to put two TPU 8i chips onto a single package, which gives double the compute, double the SRAM and double the HBM bandwidth of a standard TPU 8i.
Since the system fits twice the silicon within the existing rack footprint, Google says data centers can deploy significantly more compute per square foot and per watt. Google’s post doesn’t give an availability date for either system, though Bloomberg has reported that the new TPUs are slated to launch in 2027.
A Push To Make TPUs Easier To Use
Alongside the hardware, Google detailed a series of software moves meant to make TPUs more accessible to developers outside its own walls. It said TPUs now have nearly 100 customers, including frontier labs, trading firms, retailers and universities, and that customers can now deploy them directly in their own data centers, a shift Google Cloud CEO Thomas Kurian had recently described as selling TPUs as hardware through on-premise deals and “neocloud” partners. Among the updates:
- TorchTPU: Google open-sourced the project last month, allowing PyTorch code and Hugging Face models to run natively on TPUs, with backends for inference engines like vLLM and SGLang. The tool had already figured in SemiAnalysis’s finding that Ironwood delivers 50% better performance per dollar than Nvidia’s Blackwell Ultra.
- TPU agent suite: An open-source suite, now in preview, that plugs into coding tools like Claude Code, Cursor and Google Antigravity to automate TPU onboarding, diagnose bottlenecks and autotune custom kernels.
- TPU Sync: An open-source model-state layer that tiers KV caches across chip memory, host memory and storage, which Google says cuts KV transfer latency and time to first token by more than 90%. It follows Google’s open-sourcing of TPU Raiden, a library for moving KV-cache data between chips during inference.
- Agent Compute Engine: Software that suspends idle agent sessions and moves their working memory off the chip in milliseconds, to cut costs while agents wait on tools or humans.
- Cloud Pathways and GKE dynamic slicing: Both are now generally available. Google says dynamic slicing can cut job startup times by up to 5x and speed up fault recovery by up to 4.5x.
Google also said its native vLLM-TorchTPU stack posted state-of-the-art price-performance on the InferenceX and AgentX benchmarks, which test agentic coding and long-context work. SemiAnalysis had earlier found that Google’s seventh-generation TPUs beat Nvidia’s best chip on an agentic inference benchmark, with Google running its own TorchTPU vLLM stack.
The Compute Race Keeps Heating Up
The announcement comes as demand for AI compute reshapes how companies think about infrastructure. Anthropic signed a deal last year to use up to a million Google TPUs, and in April followed it with a new agreement with Google and Broadcom for multiple gigawatts of next-generation TPU capacity starting in 2027. OpenAI, meanwhile, had begun using Google’s TPUs for parts of its operations.
Nvidia, the incumbent, has been watching closely. When reports emerged that Meta was in talks to use Google’s chips, it publicly responded that it was delighted by Google’s success while insisting it remained a generation ahead. Google’s ambitions for the chips extend well beyond the data center, too: it recently sent TPUs to space aboard a SpaceX rocket.
Google, for its part, says it’s using AI to build the chips themselves, citing DeepMind’s AlphaChip and the use of Gemini to produce chip layouts in hours rather than weeks. That pace, it argues, is how it can ship four TPU systems in a single year.